1. Field of the Invention
The invention relates to data access of memories, and more particularly to data access of flash memories.
2. Description of the Related Art
A flash memory is usually installed in a data storage device for data storage. To provide a data storage device with a greater data capacity, the data storage device usually comprises a plurality of flash memories. A controller of the data storage device therefore must manage data access of a plurality of flash memories. When the data storage device receives a series of access commands from a host, the controller must determine which flash memory to access by the access commands, and then sends the access commands to the corresponding flash memory, thus performing the operations requested by the access commands.
Referring to FIG. 1, a flowchart of a conventional data access method 100 for a controller of a flash memory device is shown. The controller first receives an access command from a host (step 102). The controller then determines a target memory accessed by the access command (step 104). Because the target memory may be busy, processing data previously received from the controller or integrating or moving data stored therein, it may be in a busy state, thereby preventing it from receiving new data from the controller. After the target memory is determined, the controller therefore must determine whether the target memory is in a busy state (step 106). When the target memory is in a busy state, the controller must wait for a predetermined period. After the predetermined period has passed, the controller then determines again whether the target memory is still in a busy state (step 106). A loop is recursively performed until the target memory is determined to not be in a busy state.
When the controller determines that the target memory is not in a busy state (step 106), the target memory can receive new data and new access commands from the controller. Thus, the controller therefore sends an access command to the target memory to access data stored in the target memory (step 110). The access command may be a read command requesting that the target memory reads data therefrom or a write command requesting that the target memory writes data thereto. After the access command is executed, the controller then reports a data access result to the host (step 112). Finally, if the host sends another access command to the flash memory device (step 114), the controller performs steps 102˜112 again.
The conventional data access method 100 shown in FIG. 1 has shortcomings. When the target memory is in a busy state at step 106, the controller must wait for a long period until the target memory returns to an idle state and can receive new commands from the controller. When the controller is waiting for the target memory, the controller cannot process subsequent commands sent by a host, resulting in a long execution delay of access commands from the host, thereby degrading the performance of the data storage device. A data access method is therefore required, which decreases delay time for executing access commands sent by a host.